IC
Integrated Power Stage
Smart Power Stage

uPI’s power stage portfolio ranges to 120 A peak current and are available in multiple packages These power stages offer excellent power conversion efficiency and thermal performance that result in best power density combined with fast protection features to enable reliable and robust operation over lifetime of the end system.
Accurate output current and temperature telemetry also helps improve system intelligence and processor performance significantly.
SMART POWER STAGE
HPC Solutions
High Performance Computing
DC/DC Power Conversion for Graphics, Motherboard, Notebook, Server, Datacenter, AI Telecom Applications
Power Density Aggressively Growing

ASIC CPU GPU power density aggressively growing


- DPWM Controller development for higher phase counts operation need.
- Higher Power Density Power Stage development MCM / Monolithic.
Exponential Growth in Processing Power


What makes a Smart Power Stage?
Power Stage Focus
High Efficiency within TDC and heavy load.
Current┃Temperature
OCP┃OTP┃UVLO┃HMSP┃Pre-OVP

Fault Repotting

Thermal Dissipation

Robust Design

Minimize BOM and Space
Typical VR Solution for VCORE solution



IOUT : Output signal communicates the load seen by the VR
TOUT : Output Signal communicates the highest temperature in a multiphase configuration and Report to VR when fault happen in SPS
Power Density Aggressively Growing
Client Computing

High Performance Computing

Enterprise Server


Monolithic Type will be the majority applied in Client.
- Lower TDC , but higher Peak Current for CPU transient performance.
- IMON Accuracy (+/ 3%)
- Smaller Package for cost optimization ( BOM & Space)
- Majority in Monolithic Package : 3×4 / 3×5 / 4×5 / 4×6 / 5×6

MCM will be the majority applied in HPS / AI / Server
- High Power Density (High TDC and Peak Current)
- High IMON Accuracy (+/ 2%)
- High Reliability
- TLVR Support paring with Inductors
- Majority in MCM Package 3×4 / 4×6 / 5×6
VR Design Considerations
Future in TLVR
Eff & Transient
- Transient performance is primarily determined by Lc.
- TL primary side self inductance can be relatively large to maintain high efficiency.
Cost
- No need to add excessive output capacitors to balance between efficiency and transient.
Benefits
- The TLVR improves transient & efficiency performance, while cut the capacitor cost by 70%.