Battery Protection Integration

Reliable / Robust / High Performance

Radiation Noise Immunity
System Noise Immunity
Turbo Boost Compatible

CSP Thinner. Lighter. Cooler.

Ultra Low resistance

Battery Protection

To form a E-FUSE circuitry by PowerMOS & PTIC and to shutdown energy path between battery cell and system under fault condition.

Need to support SFC (single fault condition) scenario

Single Cell

Application

1^st Protection Means:
CSP PowerMOS + 1^st PTIC

2^nd Protection Means:
CSP PowerMOS + 1^st PTIC

2S~4S

Multi Cell Application

1^st Protection Means:
30V PowerMOS + GG IC

2^nd Protection Means:
FUSE + 2^nd PTIC

>5S

Multi Cell Application

1^st Protection Means:
MV PowerMOS + AFE + MCU

2^nd Protection Means:
FUSE + MCU

Key Features

PTIC: ESD >2.5kV, MSL1, RS/RF sustainability.
PowerMOS: ESD >2.5kV, MSL1, robustness to reverse charging and short-circuit.

Single Cell Application

Wearable device 1S

Power bank 1S

Smart phone 1S

Tablet, pad 1S

PowerMOS

Cell number	Part Number	Segmentation
1S	QN1001R6E	12V / 5mR CSP 6pin
	QN1011R6E	12V / 5mR CSP 6pin
	QN1002RAE	12V / 3mR CSP 10pin
	QN1009RAE	12V / 3mR CSP 10pin

Multi Cell Application (2S~4S)

Notebook PC (NB PC)

1^st Protection Means formed by Gas Gauge IC

2^nd Protection Means formed by uPI 2^ndPTIC

PTIC

Cell number	Part Number	Segmentation	Able to be stacked
2~4S	uP8306	2~4S 2nd PTIC OVP+PTC	Could be stacked
2~4S	uP8207	2~3S 2nd PTIC OVP only	Could be stacked

PowerMOS

Cell number	Part Number	Segmentation
2S~4S	QM3016AM3	30V / 4mR / PRPAK3x3
2S~4S	QN3001M3E	30V / 2mR / PRPAK3x3

Multi Cell Application (>5S)

1^st Protection Means of ESS, BBU, EVB (electric-vehicle battery)

E-bike 7S~10S

E-motor 10S~20S

ESS (Energy Storage System) 13S~20S

Backup Battery Unit 13S~20S

Cost Effective Topology of Specific Application

Power tool 5S

PowerMOS

Cell number	Part Number	Description
6~8S	QN4106M6N	40V / 1.5mR / PRPAK5x6
6~8S	QN6101M6N	60V / 2.8mR / PRPAK5x6