The uP1966E is designed to drive both high-side and low-side GaN FETs in half bridge topologies. It integrates an internal bootstrap supply and UVLO. The uP1966E has split gate outputs that can operate to several MHz on both high and low side drive channels, providing the ability to adjust both turn-on and turn-off transition times independently. A clamping circuit is used on the high side drive to keep unwanted transients from damaging GaN device gates. The uP1966E has two PWM inputs that independently control high side and low side drive signals. The uP1966E is available in a 12-pin WLCSP package that minimizes package inductance for improved high-speed operation. The uP1966E comes in a 1.6mm WLCSP1.6×1.6-12B package.